FEC STANDARD INTERFACE

Updated 02/16/2011


All FEC testers use a standard external/handler interface based on our B502A interface driver board.
Schematic

The interface connector (on the B502A) is a 37 pin female DSUB type connector.  Here are the pin assignments.
1  Unused
 20  -End Of Test (EOT)
2  Unused
 21  Auxiliary out #1
3  Common Ground
 22  Auxiliary out #2
4  +12V for user
 23  Auxiliary out #3
5   Unused
 24  Auxiliary out #4
6   Unused
 25 Unused
7   Unused
 26 Unused
8   Unused
 27 Unused
9   Unused
 28 Unused
10  Unused
 29  -Bin 16
11  Unused
 30  -Bin 15
12  Start Test input
 31 -Bin 14
13  -Bin 1
 32 -Bin 13
14  -Bin 2
 33  -Bin 12
15  -Bin 3
 34  -Bin 11
16  -Bin 4
 35  -Bin 10
17  -Bin 5
 36  -Bin 9
18  -Bin 6
 37  -Bin 8
19  -Bin 7

There are two standard 12' interface cables that match the B502A.
C137 has a 37 pin female connector on the "other" end that matches our test stations, scanners, and our optional BCD16 optical isolator.
C114 is uncommitted on the free end to be used by the customer for special installations.
FEC will attach connectors to match compatible customer's handers if details are supplied.
Inserting a BCD16 between the tester and handler will allow many incompatibilities to be corrected. That is because the BCD16 has many jumper selectable options.

VOLTAGE/CURRENT LEVELS

The Start Test default input expects a nominal +12V signal into a 1K Ohm input resistance.  However the circuit will respond to levels from about +5V. The signal may come from electronic drivers or from switch or relay contacts.
The B502B also has a jumper option to accept low going TTL level inputs. Both the +12V default and the TTL (low) signals are filtered to reject normal switch noise or bounce.

All of the outputs are "open collector" type drivers in the 7545x driver family. You can connect loads or pullups to our +12V supply or furnish your own supply up to +24V. If your loads are inductive they must be clamped to avoid inductive voltage spikes back into the drivers.

STANDARD TIMING

The EOT will always go false about 1ms after receipt of a new Start Test signal. It will remain false until at least 1ms after the BIN outputs become valid.
The Start Test signal must be held true for at least 1ms and then go false for at least 20ms before becoming true again.
The tester will not recycle even if Start Test is held true indefinitely.
The most recent BIN output may remain true until it is changed by a new bin decision. However in some cases the BIN outputs may be changed during the test sequence for special purposes. The correct BIN output will always be true at least 1ms before EOT.

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